Field of the Invention
This invention is regarding a substrate structure and a manufacturing method thereof. More precisely speaking, this invention is regarding a semiconductor substrate structure and a manufacturing method thereof.
Descriptions of the Related Art
In recent years, users seek electronic products with compact size, high performance and versatility. Electronics manufacturers must accommodate more components in a limited area of an integrated circuit (IC) to achieve high density and miniaturization. Thus, electronics manufacturers develop a new package, such as a flip-chip (FC) package, a chip scale package (CSP), a wafer level package (WLP) and a three-dimensional (3D) package, of the IC.
Electronic circuits for different functions, such as applications of digital, analog, memory or radio frequency, will have different needs and structures. Thus, integration of different functions on a single die is not an optimized solution. The system chip is in a single package, which has multidimensional space architecture, to incorporate different dies with heterogeneous technologies and different operating voltages by the developments of system on chip (SOC) system-in-package (SiP) package-in-package (PiP) package-on-package (PoP), and chip scale package (CSP). Further, the package of the system chip has been advancing toward a three-dimensional package which can integrate dies, packages and passive components in one package.
In prior art, an inter-layer height of a multilayer stack package can be controlled by using rigid conductors as supports. However, an alignment control of the aforementioned method is difficult. Further, the inter-layer height of the multilayer stack package controlled by using solder balls as supports will cause a height restriction, and the upper substrate will suppress the lower components. In the traditional three-dimensional (3D) package, the more layers of the package represent more system modules inside the 3D package, such that heat generated by operation of each system module will result in poor cooling effect of the 3D package. Thus, the reliability of the 3D package will be affected to reduce the yield rate of packaging process.
In view of this, it is important to provide a substrate structure having rigidity and heat dissipation and meeting the high yield rate of packaging process.